New Study by Zhou Addresses Garbage Collection Issues in NAND Flash-Based Solid State Devices

A new study by the TSYS School’s Yi Zhou and colleagues from both Jinan University (China) and Auburn University proposes a new scheme to boost the performance of NAND flash-based solid state devices.  As they explain, garbage collection (GC) plays a pivotal role in the performance of 3D NAND flash memory, where “copy back,” which is an operation where data are read from one location and copied to another location, has been widely used to accelerate valid page migration during garbage collection.  Unfortunately, copy back is constrained by a parity symmetry issue such that data read from an odd/even page must be written to an odd/even page.  After migrating two odd/even consecutive pages, a free page between the two migrated pages will be wasted.  These wasted pages noticeably lower free space on flash memory and cause extra garbage collections, thereby degrading solid state device performance.  To address this problem, the study by Zhou and colleagues, which is set to appear in a forthcoming issue of ACM Transactions on Storage, proposes a page-state-aware cache scheme called PSA-Cache, which prevents page waste by breaking odd/even consecutive pages in subsequent garbage collections.  The study quantitatively evaluates the performance of PSA-Cache in terms of the number of wasted pages, the number of garbage collections, and response time by comparing it to two state-of-art schemes, GCaR and TTflash.  The experiments reveal that PSA-Cache outperforms the existing schemes.  More specifically, PSA-Cache curtails the number of wasted pages that result from implementation of GCaR and TTflash by 25.7% and 62.1%, respectively.  Moreover, PSA-Cache cuts back the number of garbage collection counts by as much as 78.7%, while it reduces the average write response time by up to 85.4%.